Ansys RaptorH |
EM-Sense Enabled Smartwatch | Simulation in Wearable Technology
The Fastest and Most Accurate EM Extraction and Modeling for Pre-LVS Silicon Devices
- RaptorH EM modeling combines the golden HFSS simulation engine with the silicon-optimized RaptorH engine in a platform created for chip designers
- With ease, the interface lets you transparently choose between the HFSS engine and the Raptor engine.
- This combination of engines provides ultra-high capacity in combination with silicon-accurate results and fast modeling times.
- As the complexity of modern circuits increases, your design may often include hundreds of ports or nets.
- RaptorH is the only product on the market that, due to its unrivalled capacity, can calculate RLCk parasitics for highly complex circuits such as power grids, full custom blocks, spiral inductors and clock trees.
- RaptorH can, with extreme precision, extract any arbitrary routing and layout, including power grids, planes (solid and perforated), round shapes and MiM/MoM capacitors.
- It does not require definition of boundary conditions or special types of ports. RaptorH generates passive, causal models as S-parameter models (for AC, harmonic balance and SP analyses).
- Employs highly compact RLCk netlist models suitable for transient, shooting and noise analyses.
- With RaptorH, RLCk modeling and simulation is completed in minutes, compared to other competing solutions on the market, which can take hours or entire workdays.
- In addition, its speed accelerates linearly with the number of cores.
- RaptorH is integrated into LVS/RC Extraction flows from all major EDA vendors and offers point-and-click integration with popular custom layout tools.
- In addition, RaptorH is optimized for analyzing semiconductor circuits and is well-supported by all major silicon foundries.
- It can read technology description files that have been encrypted by foundries and can use these to set up analyses with either the HFSS or the Raptor engine.
- RaptorH’s GUI allows a point-and-click-based net selection process and can use existing layout pins and labels.
- It can readily add or exclude nets for debugging circuits with “what-if” analysis and for the evaluation of crosstalk among blocks.
- RaptorH also supports batch runs for routine jobs, eliminating redundant workflows for engineers.
- In addition, RaptorH integrates with all popular design and physical implementation platforms.